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Capacitance-voltage characteristic of edge and top contacted memory cell. The measured capacitance is intepreated using the inset equialivent circuit, which considers capacitance associated with interface states ( C it ), semiconductor channel ( C s ), and hBN dielectric layer ( C hBN ).
#Line Plot#Capacitance-Voltage Characteristic#Memory Cell#Equivalent Circuit#Interface States#Semiconductor Channel#Dielectric Layer
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